Monday, October 17, 2005

SC Decoder

Today I satrted to model SC- Decoder.
I found one problem that In TDD mode only a single Frame
preamble defined in a frame which can be as long as 2ms.
I can detect the preamble and I can lock the SS's clock to BS's.
But the locked clock must have an error.
If we have 1 ppm error , the clock offset will be accumulated 2pi*20
during 2 ms.
I don't think it's easy to have such accuracy.
It seems that I have to track the clokc offset even in 64-QAM mode.


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